Day 1: Tuesday, September 2, 2014 - TUTORIAL DAY |
7:45am – 4:00pm |
Registration REGISTRATION DESK |
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9:00am – 5:00pm |
Tutorials Chair: Yuejian Wu, Infinera |
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Morning - Tutorial Track A - SUNSET 1 |
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10:00am – 10:30am |
Coffee Break FOYER |
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Morning - Tutorial Track B - SUNSET 2 |
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10:00am – 10:30am |
Coffee Break FOYER |
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12:00noon – 01:30pm |
Lunch Break SPICE MARKET BUFFET |
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Afternoon - Tutorial Track A - SUNSET 1 |
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3:00pm – 3:30pm |
Coffee Break FOYER |
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Afternoon - Tutorial Track B - SUNSET 2 |
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3:00pm – 3:30pm |
Coffee Break FOYER |
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Day 2: Wednesday, September 3, 2014 |
7:45am – 4:00pm |
Registration REGISTRATION DESK |
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8:30am –11:55am |
Session WPL - Opening Session, KeyNote and plenary speeches - WILSHIRE A&B Chair: Kaijian Shi, Cadence Design Systems Co-Chair: Thomas Buechner, IBM |
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09:00am – 09:15am |
Welcome Note Kaijian Shi, Cadence Design Systems, General Chair |
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09:15am – 09:30am |
Technical Program Overview Thomas Buechner, IBM, Technical Program Chair Danella Zhao, Univ. of Louisiana, Technical Program Co-Chair |
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10:30am – 10:45am |
Coffee Break (Sponsored by Cadence Design Systems) |
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11:45am – 01:30pm |
Lunch Break SPICE MARKET BUFFET |
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1:30pm – 2:45pm |
Session WP1A - Low Power Circuits - SUNSET 1 Chair: Gururaj Shamanna, Intel (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Yuejian Wu, Infinera (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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1:30pm – 2:45pm |
Session WP1B - Embedded Systems, Multi/Many Core Systems and Embedded Memory Technologies - SUNSET 2 Chair: Ram Krishnamurthy, Intel (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Oliver Sander, Karlsruhe Institute of Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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02:45pm – 03:05pm |
Coffee Break (Sponsored by Aldec) FOYER |
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3:05pm – 4:45pm |
Session WP2A - Low Power Methodologies and Architectures - SUNSET 1 Chair: Gururaj Shamanna, Intel (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Sao-Jie Chen, National Taiwan University (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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3:05pm – 4:20pm |
Session WP2B - 3D integration - SUNSET 2 Chair: Yuejian Wu, Infinera (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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4:45pm – 6:15pm |
Poster session and reception (food and drinks) - LONDON CLUB Chair: Thomas Buechner, IBM (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Danella Zhao, Univ. of Louisiana (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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P4 A Clock Generator Based on Multiplying Delay-Locked Loop Chorng-Sii Hwang1, Ting-Li Chu2, Wen-Cheng Chen1 1Department of Electrical Engineering National Yunlin University of Science and Technology, 2Graduate School of Engineering Science and Technology National Yunlin University of Science and Technology |
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P24 Flexible Reconfigurable Architecture for DSP Applications Abdulfattah Obeid1, Syed Manzoor Qasim1, Mohammed S. BenSaleh1, Zied Marrakchi2, Habib Mehrez2, Heni Ghariani3, Mohamed Abid3 1KACST, Saudi Arabia, 2LIP6, France, 3CES, ENIS, Tunisia |
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Day 3: Thursday, September 4, 2014 |
8:00am – 4:00pm |
Registration FOYER |
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9:00am – 11:10am |
Session TPL - Thursday Keynote and Plenary Speech - WILSHIRE A&B Chair: Kaijian Shi, Cadence Design Systems |
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10:55am – 11:10am |
Coffee Break FOYER |
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11:10am – 12:10pm |
Session TA1A - Design Track: Power Management and Optimization - SUNSET 1 Chair: Haibo Wang, Southern Illinois University (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Karan Bhatia, Texas Instruments (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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11:10am – 11:50am |
Session TA1B - Design Track: Memory and DSP Applications - SUNSET 2 Chair: Mark Schrader, Schrader Consulting (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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12:10pm – 01:40pm |
Lunch Break SPICE MARKET BUFFET |
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1:40pm – 3:20pm |
Session TP1A - Data Converters - SUNSET 1 Chair: Poki Chen, National Taiwan University of Science and Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Danella Zhao, Univ. of Louisiana (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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1:40pm – 3:20pm |
Session TP1B - Networks on Chip - SUNSET 2 Chair: Danella Zhao, Univ. of Louisiana (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Sakir Sezer, Queen's University Belfast (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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1:40pm – 3:20pm |
Session TP1C - System Level Design - SUNSET 3 Chair: Sao-Jie Chen, National Taiwan University (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Mark Schrader, Schrader Consulting (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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3:20pm – 3:40pm |
Coffee Break FOYER |
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3:40pm – 5:20pm |
Session TP2A - DSP Architectures and Methodologies - SUNSET 1 Chair: Tobias Noll, RWTH Aachen University (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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4:05pm |
Session TP2A - 2 New Quantization Error Assessment Methodology for Fixed-Point Pipeline FFT Processor Design Chen Yang1, Yizhuang Xie1, He Chen1, Yi Deng2 1School of Information and Electronics,Beijing Institute of Technology,Beijing,China, 2Department of Electrical and Computer Engineering,Virginia Polytechnic Institute and State University,Arlington, VA, USA |
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3:40pm – 5:20pm |
Session TP2B - Testability and Manufacturability - SUNSET 2 Chair: Chris Ryan, Maxim Integrated (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Martin Margala, University of Massachusetts Lowell (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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4:30pm |
Session TP2B - 3 IP Watermark Verification Based on Power Consumption Analysis Cédric Marchand1, Lilian Bossuet1, Edward Jung2 1Laboratoire Hubert Curien, UMR CNRS 5516, University of Lyon, Saint-Etienne, France, 2School of Computing and Software Engineering, Southern Polytechnic State University, GA, USA |
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3:40pm – 5:20pm |
Session TP2C - Reconfigurable and Programmable Circuits and Systems - SUNSET 3 Chair: Oliver Sander, Karlsruhe Institute of Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Helen Li, University of Pittsburgh (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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5:20pm – 5:30pm |
Coffee Break FOYER |
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5:30pm – 7:00pm |
Panel Discussion - WILSHIRE A&B Chair: Thomas Buechner, IBM |
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The End of the Microprocessor Chip - Will SoCs dominate computing? Panelists: Jeffrey D. Brown, Distinguished Engineer, Emerging Product Development and Hardware Architect, SoC, IBM Norris Ip, Solutions Group Director, Cadence Ram Krishnamurthy, Head of High Performance and Low Voltage Circuits Group, Intel Labs Nigel Paver, ARM Fellow Sakir Sezer, Director of Research, ECIT, Queen's University Belfast and CTO, titanic systems
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7:00pm – 9:00pm |
Banquet Dinner - LONDON CLUB Chair: Kaijian Shi, Cadence Design Systems |
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Day 4: Friday, September 5, 2014 |
8:30am – 11:00am |
Registration FOYER |
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9:00am – 10:15am |
Session FA1A - Special Session: Memristor-based Processors - SUNSET 1 Chair: Dhireesha Kudithipudi, Rochester Institute of Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Garrett Rose, AirForce Research Laboratories |
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9:00am – 09:50am |
Session FA1B - Analog Circuits - SUNSET 2 Chair: Poki Chen, National Taiwan University of Science and Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Hongjiang Song, Intel (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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9:50am – 10:40am |
Session FA2B - Verification - SUNSET 2 Chair: Poki Chen, National Taiwan University of Science and Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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10:40am – 10:55am |
Coffee Break FOYER |
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10:55am – 12:10pm |
Session FA3A - Biomedical Circuits and Systems - SUNSET 1 Chair: Ken Hsu, Rochester Institute of Technology (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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10:55am |
Session FA3A - 1 A Highly Sensitive ISFET Using pH-to-Current Conversion for Real-Time DNA Sequencing Mohammad Uzzal1, Payman Zarkesh-Ha1, Jeremy Edwards2, Ezequiel Coelho2, Priyanka Rawat2 1Electrical and Computer Engineering, University of New Mexico, Albuquerque, NM, USA, 2Molecular Genetics and Microbiology, University of New Mexico, Albuquerque, NM, USA |
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10:55am – 12:10pm |
Session FA3B - Wireless and wireline communication circuits and methodologies - SUNSET 2 Chair: Mark Schrader, Schrader Consulting (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Hongjiang Song, Intel (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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10:55am – 12:10pm |
Session FA3C - Advances in SRAM Design - SUNSET 3 Chair: Norbert Schuhmann, Fraunhofer IIS (This email address is being protected from spambots. You need JavaScript enabled to view it.) Co-Chair: Sakir Sezer, Queen's University Belfast (This email address is being protected from spambots. You need JavaScript enabled to view it.) |
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11:45am |
Session FA3C - 3 A 40nm 256kb 6T SRAM with Threshold Power-Gating, Low-Swing Global Read Bit-Line, and Charge-Sharing Write with Vtrip-Tracking and Negative Source-Line Write-Assists Chao-Kuei Chung1, Chien-Yu Lu1, Zhi-Hao Chang1, Shyh-Jye Jou1, Ching-Te Chuang1, Ming-Hsien Tu2, Yu-Hsuan Chen2, Yong-Jyun Hu2, Paul-Sen Kan2, Huan-Shun Huang2, Kuen-Di Lee2, Yung-Shin Kao2 1National Chiao-Tung University, 2Faraday Technology Corporation |
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01:00pm – 6:00pm |
Hoover Dam Tour Chair: Venki Muthukumar, University of Nevada Las Vegas |
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