IEEE SOCC 2014 - Committees

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General Chair

Kaijian Shi
Cadence Design Systems

Technical Program Chair

Thomas Büchner
IBM

Technical Program Co-Chair

Danella Zhao
University of Louisiana at Lafayette

Financial and Publication Chair

Ramalingam Sridhar
SUNY at Buffalo

Tutorial Chair

Yuejian Wu
Infinera

Publicity Chair

Andrew Marshall
University of Texas at Dallas

Sponsorship/Exhibition Chair

Karan Bhatia
Texas Instruments

Local Organizing Committee Chair

Venki Muthukumar
University of Nevada Las Vegas

Steering Committee Chair

Norbert Schuhmann
Fraunhofer IIS

Europe Liaison

Sakir Sezer
Queen's University Belfast

Asia-Pacific Liaison

Sao-Jie Chen
National Taiwan University

Industrial Liaison

Nagi Naganathan
LSI Corp.

1. Analog and Mixed-Signal Circuits and Systems
Suhwan Kim Seoul National University	Poki Chen National Taiwan University of Science and Technology
2. Biomedical Circuits and Systems
Ken Hsu Rochester Institute of Technology	Sumer Can Diodes, Inc.
3. Wireline and Wireless Communication Circuits and Systems
Mark Schrader Optech Inc.	Gerd Ascheid RWTH Aachen University, Germany
4. Digital Signal Processing (DSP) Circuits and Systems
Zhongfeng Wang Broadcom Corp.	Tobias Noll RWTH Aachen University, Germany
5. Low-Power, “Green” Circuits, Systems, and Design Methodologies
Gururaj Shamanna Intel	Na Gong North Dakota State University
6. Embedded Systems, Multi/Many Core Systems & Embedded Memory Technologies
Martin Margala University of Massachusetts Lowell	Helen Li Polytechnic Institute of New York University
7. Network on Chip (NoC), Interconnects, and 3D-IC
Radu Secareanu Freescale	Masoud Daneshtalab University of Turku, Finland
8. Reconfigurable and Programmable Circuits and Systems
Jürgen Becker Karlsruhe Institute of Technology, Germany	Oliver Sander Karlsruhe Institute of Technology, Germany
9. System Level Design Methodology and Tools
Tsung-Yi Ho National Cheng Kung University, Taiwan	Jinhui Wang Beijing University of Technology, China
10. Design for Testability and Manufacturability
Chris Ryan Maxim Integrated Inc.	Emrah Acar IBM
11. Design Verification
Gopal Srinivasan Nvidia	tbd
12. Computing Platform Architectures
Nat Seshan Microsoft	Abbes Amira University of the West of Scotland, UK
13. Design Track
Thomas Büchner IBM	Danella Zhao University of Louisiana at Lafayette

Steering Committee Chair Norbert Schuhmann Fraunhofer IIS	Steering Committee Past Chair Ramalingam Sridhar SUNY at Buffalo
Steering Committee Members
Thomas Buechner IBM	Sao-Jie Chen National Taiwan University
Suhwan Kim Seoul National University	Ram Krishnamurthy Intel
Andrew Marshall University of Texas at Dallas	Sakir Sezer Queen's University Belfast
Kaijian Shi Cadence Design Systems	Thanh Tran BD Bioscience
Danella Zhao University of Louisiana at Lafayette

Emrah Acar IBM, USA	P.R. Mukund Rochester Institute of Technology, USA
Ali Ahmadinia Glasgow Caledonian University, UK	Venki Muthukumar University of Nevada Las Vegas, USA
Abbes Amira University of the West of Scotland, UK	Nagi Naganathan LSI Corp., USA
Gerd Ascheid RWTH Aachen University, Germany	Tobias Noll RWTH Aachen University, Germany
Richard Auletta Hewlett-Packard, USA	Maurizio Palesi University of Catania, Italy
Jürgen Becker Karlsruhe Institute of Technology, Germany	Sri Parameswaran University of New South Wales, Australia
Karan Bhatia Texas Instruments, USA	Nuria Pazos Escudero Univ. of Applied Sciences Arc, Switzerland
Thomas Büchner IBM, Germany	Tamer Ragheb Texas Instruments, USA
Sumer Can Diodes, Inc., USA	Sandip Ray Intel, USA
Hung-Ming Chen National Chiao Tung University, Taiwan	Emma Regentova University of Nevada Las Vegas, USA
Poki Chen National Taiwan University of Science and Technology, Taiwan	Chris Ryan Maxim Integrated Inc.
Sao-Jie Chen National Taiwan University, Taiwan	Oliver Sander Karlsruhe Institute of Technology, Germany
Masoud Daneshtalab University of Turku, Finland	Mark Schrader Optech Inc., USA
Liam Devlin Plextek Ltd., Cambridge, UK	Norbert Schuhmann Fraunhofer IIS, Germany
Alex Doboli SUNY at Stony Brook, USA	Radu Secareanu Freescale, USA
Eby Friedman University of Rochester, USA	Nat Seshan Microsoft, USA
Na Gong North Dakota State University, USA	Sakir Sezer Queen's University Belfast, UK
Tsung-Yi Ho National Cheng Kung University, Taiwan	Gururaj Shamanna Intel, USA
Ken Hsu Rochester Institute of Technology, USA	Kaijian Shi Cadence, USA
Suhwan Kim Seoul National University, Korea	Hongjiang Song Intel, USA
Ram Krishnamurthy Intel, USA	Ramalingam Sridhar SUNY at Buffalo, USA
Dhireesha Kudithipudi Rochester Institute of Technology, USA	Gopal Srinivasan Nvidia, USA
Luciano Lavagno Politecnico di Torino, Italy	Pinping Sun IBM, USA
Paul P. K. Lee ITT Exelis Geospatial System, USA	Himanshu Thapliyal Qualcomm, USA
Helen Li University of Pittsburgh, USA	Natarajan Viswanathan IBM, USA
Zhonghai Lu KTH Royal Institute of Technology, Sweden	Jinhui Wang Beijing University of Technology, China
Gin-Kou Ma ITRI, Taiwan	Lei Wang University of Connecticut, USA
Martin Margala University of Massachusetts Lowell, USA	Qi Wang Cadence, USA
Liam Marnane University College Cork, Ireland	Zhongfeng Wang Broadcom Corp., USA
Andrew Marshall University of Texas at Dallas, USA	Yuejian Wu Infinera, USA
Kieran Mc Laughlin Queen's University Belfast, UK	Alex Yakovlev Newcastle University, UK
	Danella Zhao University of Louisiana at Lafayette, USA

Corporate Sponsors

Distinguished Speakers

	TOM BECKLEY Senior Vice President of R&D Cadence Design Systems, Inc.
	SCOTT RUNNER VP of Advanced Methodologies and Low-Power Design Qualcomm
	J. THOMAS PAWLOWSKI Fellow and Chief Technologist Micron Technology, Inc.
	Jeffrey D. Brown Distinguished Engineer, Emerging Product Development IBM
	PAUL EREMENKO Director, Project Ara Google

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Organizing Committee

General Chair

Technical Program Chair

Technical Program Co-Chair

Financial and Publication Chair

Tutorial Chair

Publicity Chair

Sponsorship/Exhibition Chair

Local Organizing Committee Chair

Steering Committee Chair

Europe Liaison

Asia-Pacific Liaison

Industrial Liaison

Track Chairs

1. Analog and Mixed-Signal Circuits and Systems

2. Biomedical Circuits and Systems

3. Wireline and Wireless Communication Circuits and Systems

4. Digital Signal Processing (DSP) Circuits and Systems

5. Low-Power, “Green” Circuits, Systems, and Design Methodologies

6. Embedded Systems, Multi/Many Core Systems & Embedded Memory Technologies

7. Network on Chip (NoC), Interconnects, and 3D-IC

8. Reconfigurable and Programmable Circuits and Systems

9. System Level Design Methodology and Tools

10. Design for Testability and Manufacturability

11. Design Verification

12. Computing Platform Architectures

13. Design Track

Steering Committee

Steering Committee Chair

Steering Committee Past Chair

Steering Committee Members

Technical Program Committee

Sponsors

Corporate Sponsors

Distinguished Speakers

TOM BECKLEY

SCOTT RUNNER

J. THOMAS PAWLOWSKI

Jeffrey D. Brown

PAUL EREMENKO

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